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Scientists design adaptive computer chip
David Albonesi, assistant professor of electrical and computer engineering, leads the team, which has created a model called Complexity-Adaptive Processing (CAP) that monitors the way a piece of software uses the microprocessor hardware, and then adapts that hardware accordingly. The result is a more efficient processor that doesn't dawdle while running many tasks. Early tests have shown that CAP is able to halve the energy consumption of part of the chip while also improving performance. "Today's microprocessors are pretty inefficient when handling a variety of tasks," said Albonesi. "They're designed to work well overall, but since they're inflexible, they can't work as well as they could for any particular program." The innovation came to Albonesi one Saturday when he decided to lock himself in a room and not come out until he'd thought up something novel. He started to look into certain inefficient parts of a chip, such as the cache, a kind of storage closet on the chip where frequently needed information can be stored and accessed quickly. Most microprocessors today contain two types of caches, with a larger, slower cache acting as a backup to a smaller, faster one. Although the sizes of these caches are fixed in today's microprocessors, different programs require different sizes to run most efficiently. Similar to how a thermostat controls an air-conditioning system, the CAP design monitors the program as it runs and adjusts the sizes and speeds of the caches as needed, saving the energy taken to maintain them, and saving the time taken to track down information inside them. Along with Albonesi, Eby Friedman, professor of electrical and computer engineering; Sandhya Dwarkadas, assistant professor of computer science; and Michael Scott, professor of computer science, pooled their resources to develop the system further. The researchers recently received $3 million in funding from the U.S. Defense Advanced Research Projects Agency to continue the work.
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